PC100 Explained

Does It Comply with Intel's Specification???

Had I any comprehension of the difficulty I would encounter when setting down genuinely relevant information regarding PC100, I think I would have hung it up. Searching the web for PC100 documentation led to an unbelievable volume of conflicting and often outdated data. Therefore I would like to state in advance that what follows is true to the best of my knowledge but, if there are mistakes I would most certainly like to hear about them.    I have searched many sites to compile the information and would like to give them mention  Intel , AnandTech , The High-Performance PC Guide , System Optimization PC Hardware and Performance Guide , The PC Guide System Optimization PC Hardware and Performance Guide , The PC Guide , and I would like to thank some of the memory manufacturers and vendors such as NEC , Corsair , Samsung , and Viking for providing assistance in the form of documentation and components .



The main focus of this article will, hopefully, in the end, give you the ability to clearly identify the working speed and CAS latency of an Intel spec. compliant PC100 memory module and also address reliable system operation with PC100 memory modules.  To begin with, it will be necessary to make a few terms that will be used here clear. 

module.gif
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Above you'll find a representation of an SDRAM DIMM (hereafter referred to as a DIMM or module).  The memory chips or components that make up the module are actually called SDRAMs (references to SDRAMs hereafter will be to these memory chips).   The EEPROM is a small chip located on the DIMM that contains informational data about the DIMM and SDRAMs.


Introduction

When this site first came into existence back in July '98, I was inundated with email messages relating to problems that users were experiencing when introducing new "PC100" memory into their systems.  At that time, with the super 7 initiative and Intel's 100MHz system bus specification still relatively new as far as endusers were concerned, many of us had relied upon an industry that had no clear (absolute) standards to follow and bought new memory for our systems without much of a clue as to what really would be required of it.

The technology has improved radically over the last few months, due for the most part, to Intel's requirement of basic testing standards for compliance with the 100MHz system bus.  The sheer volume of Intel  BX based 100MHz system sales meant that memory manufacturers would either have to comply or severely limit their sales to standard 66MHz SDRAM. These rigorous new design, production and test standards required significant changes for semiconductor companies and memory module suppliers.  In part due to the complexity and lack of understanding of the PC100 requirements and the sheer expense of retooling for production , some vendors were, and a few still are, selling DIMMs labeled as PC100 - on inferior 4 layer PCBs ( printed circuit boards ) with poor quality trace elements (those little lines of copper filament that make up the circuit on a PCB) and lacking terminator resistors all of which can create a good deal of signal interference and degradation - that does not meet Intel's PC100 specification.  Many of these non-compliant modules can cause crashes in our new high speed systems especially when more than one DIMM is being used.  However, most manufacturers have now come in line with more consistent manufacturing tolerances, and have all but eliminated these problems.   But now you the enduser need to get to know how to identify the proper PC100 to meet your needs.


Specifications

In a perfect world these specifications would have included a consistent system for marking the SDRAMs themselves to avoid confusion, but alas, not being in a perfect world, we are forced to deal with a plethora of markings that differ not only by manufacturer but even within individual manufacturers themselves. Because so many of us haven't taken the time to decipher all of these product codes, we have forced ourselves into having to rely on reseller's and store clerks' veracity to get PC100 modules that will correctly meet our needs. And because most of them were as ill-informed as we or were less than honest, we, endusers, suffered the consequences, buying system memory that was not as fast or as capable as we had expected. Even just a month ago there were all sort of claims from the industry, some vendors offering 8ns, 7ns or even 6ns parts, when, in fact, were offering only 10ns parts.   Problems are not limited to vendor mis-information though. Module manufacturers can take these chips marked with "-7" or "-6" and the like (really -10ns rated) and put them on a DIMM together with an SPD (serial presence detect) EEPROM (a tiny chip found on each module containing architectural and informational data about the module) that instructs the system to run the module like a true -8ns . This results in a DIMM that, while it may function correctly, is already technically overclocked, making enduser overclocking impossible, and in systems with more than one module, can cause all sorts of compatibility problems.  Although 10ns components can function at 100MHz, when attached to the DIMM module they will have lost some of their performance abilities due to a number of factors (i.e. trace inductance and resistance, solder joints, terminal resistance etc.) therefore true PC100 compliant DIMMs have to be made up of 8ns (125MHz) components to compensate.  Did you get that?  In order to be Intel PC100 compliant; DIMMs have to be made up of 8ns (125MHz) components.


When choosing PC100 it is important to consider the timing speed (or frequency) and the CAS latency factor (often abbreviated CL2 or CL3).

Timing

The timing speed of  memory  refers to the period of time for the completion of a full clock cycle at a given frequency. It can be calculated using the reciprocal of the asserted component's frequency. For instance a memory chip with a given  rated frequency of 100Mhz, could also be described as having a timing speed of 10ns (ten billionths of 1 second).  Therefore a chip with a rated timing speed of 8ns would have a rated frequency capability of 125MHz, and 7ns a rated frequency of 143MHz. This is a good thing to know if you plan on overclocking your system by means of increasing the front side bus. Now you will know that if your PC100 DIMM has a rated timing speed of 8ns, you can safely run your CPU/Memory bus up to near 125MHz without the memory failing.  The Table below can help you to determine the reliable performance timing speed of your DIMM module in relation to the individual SDRAM components comprising it.

Individual SDRAM Freq. & DIMM Module Freq.

Timing

SDRAM
Freq.

Reliable DIMM
Module Freq.

12ns

83MHz

75MHz

10ns

100MHz

83MHz

8ns

125MHz

112MHz

7.5ns 133MHz 124MHz

7ns

143MHz

133MHz


CAS Latency

In order to understand the CAS latency factor, it is first very helpful to understand a little bit about how system RAM is accessed  by other components in your system.   The first step in understanding this, is to learn how the individual memory 'cells' are addressed.  Let's take as an example a common 64Mbit chip, configured as 16Mx4 (there are also 8Mx8 and 4Mx16 architectures).

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In each SDRAM there are 4 bank arrays of memory, each bank contains 4M (4,194,304) addresses with 4 bits each; so there are 4,194,304 different memory 'cells', each of which contains 4 bits of data in each bank.  You can envision and individual SDRAM as a giant worksheet containing 64M (67,108,864) cells all in rows and columns with separate addresses on four different sheets.  When a component, such as your CPU requires a specific bit of data from a given address, it generates a set of signals across the memory address bus to the memory controller.   The memory controller decodes the memory address into a 2 part binary number access/read command  and determines which chips are to be accessed.    The bottom part of this memory address binary code (which determines the memory cell's row) is sent to the chips to be read.  After allowing sufficient time for this row address signals to stabilize, the memory controller sets the row address strobe, or RAS signal to zero.   When the RAS signal has reset to zero, the entire row (all 1024 columns) selected  is read by the circuits in the chip.  Then the upper half of the decoded binary memory address (the column address identifier) is sent to the chips to be read.  Again after allowing sufficient time for the column address signals to stabilize, the memory controller sets the column address strobe, or CAS signal to zero.  Once the CAS signal has reset to zero, the selected column is read to the output buffers of the chip, which hold the data so that other components can read it.   Now, as confusing as all of this sounds, I have really oversimplified the process.

The CAS latency parameter is used to define the delay in either 2 or 3 clock cycles from when an access command is registered on the rising edge of a clock input to RAM to when the data from that access command is available for output or access to write to the cell is achieved.  In other words, a CAS 2 DRAM DIMM can be accessed by other components 33% faster at the same clock frequency than a CAS 3 DIMM.  CAS latency can also change depending on the frequency at which the RAM is running. For instance, if you have standard DRAM (66MHz) with a CAS latency of CAS 2 and increase the CPU/Memory bus frequency to 100MHz you will most likely have to change the CAS latency timing in the BIOS to CAS 3 to prevent errors from occurring. If your PC100 has a CAS latency of CAS 2, you will most probably have to change it to CAS 3 in the BIOS when attempting to run the FSB at 112MHz+.

Serial Presence Detect

The SPD (Serial Presence Detect) device is an 8-pin serial EEPROM chip that stores information about the DIMM module such as size, speed, voltage, drive strength, and number of row and column addresses, RAM manufacturer, and module manufacturer. In fact there more than 40 different module instructs  held on the EEPROM. When the BIOS reads these parameters during POST, it automatically adjusts values in the memory controller and CMOS Chipset Features screen for the best compatibility, reliability and performance.  This EEPROM along with certain specific instructs are required to meet Intel's PC100 compliance specification.   If you are worried about having to determine the proper settings for running your memory in the BIOS, you may want to avail yourself of these newer PC100 DIMMs. If you are using an older mainboard though, you will likely have to update the BIOS to take advantage of this feature.


PC100 Compliance

In order to meet Intel's SDRAM Specification for PC100 the following criteria need to be met: Please note the exact specification from Intel  for PC SDRAM compliance, 100MHz system bus specification and SPD specification comprises a lot of pages of text - the criteria below are but a summary of some of the major points -

X : The operating frequency, in MHz, that the DIMM is intended to operate at. (Typically 66MHz, 100MHz)

A : Minimum CAS Latency, in clocks, that the DIMM module will operate at, when run at the frequency specified by ' X ' .  Generally a '2' or a '3', with '2' a better or faster choice.

B : Minimum tRCD (RAS to CAS Delay), in clocks, that the module will operate at when run at the frequency specified in ' X '. This will generally be '2'.

C : Minimum tRP (RAS Precharge), in clocks, that the module will operate at when run at the frequency specified in ' X '. This also will generally be '2'.

D : Maximum tAC (Access from Clock), in ns, that the module will exhibit when run at the frequency specified in ' X '. This will generally be 6 .

E : SPD Revision Number (Serial Presence Detect Revision number). This refers to the fact that all compliant SDRAM modules also include an SPD EEPROM.  This information is standardized, but revisions will probably occur over time. This field identifies the module as having SPD data consistent with Intel's 'Revision  1.2' specification. This field may have one or two digits in it.

F : Reserved,  generally  set to '0'

Additionally, the design revision of the SDRAM DIMM specification must be marked on the silk screen of the printed circuit board of the module. 66 MHz SDRAM DIMM specifications had no such marking.  So, now when you see a PC100 module labeled: 'PC100-322-620' you'll be able to determine that the module is PC100 compliant for operation at 100MHz, with a CAS latency of 3, a tRCD of 2, a tRP of 2, a tAC of 6ns and carries an SPD compliant with Intel's rev. 1.2.



The first step in determining whether or not your PC100 DIMM is compliant with Intel's specifications is to identify the components that make up the module itself.  First of all you will want to identify the manufacturer.  This is typically accomplished by using the part # prefix - a set of letters, numbers or symbols manufacturers use to identify the parts as their own.  In the table below you will find some commonly found 64Mbit SDRAM chips identified by their manufacturer, prefix, part # and suffix.   While it is not a complete table, it does cover a pretty good variety.  If the SDRAMs on your particular module are not found within the table, I suggest using The Chip Directory - an online search engine that can identify most any computer chip by its part #.

Table of Some Common 64Mbit SDRAMs

Manufacturer

Prefix

Part #

Suffix

Rated
Timing

Rated
Freq.

@125
MHz

@112
MHz

@100
MHz

@66
MHz

Hitachi

HB

52E88EM

-B6

10ns

100

N/A

N/A

CAS3

CAS3

IBM

IBM

13N16644HC

-260T

10ns

100

N/A

N/A

CAS2

CAS2

-360T

10ns

100

N/A

N/A

CAS3

CAS3

Hyundai

HY

XXVXXXXXX

-8

8ns

125

CAS3

CAS3

CAS2

CAS2

Lucky Goldstar Semiconductor
(LGS)

GM

72V66XXX/
(CT,CLT, DI,DLI)

-7k,-7J

10ns

100

N/A

N/A

CAS2

CAS2

-8

8ns

125

CAS3

CAS3

CAS3

CAS2

(ET,ELT)

-75

7.5ns

133

CAS3

CAS3

CAS2

CAS2

-7

7ns

143

CAS3

CAS3

CAS2

CAS2

Micron

MT

48LC8M8A2TG

-8D,-8E

8ns

125

CAS3

CAS3

CAS2

CAS2

-8A,B,C

8ns

125

CAS3

CAS3

CAS3

CAS2

Mitsubishi

M2

V64SX0BTP

-8A

8ns

125

CAS3

CAS3

CAS3

CAS2

-7(L),-8(L),
-10(L)

10ns

100

N/A

N/A

CAS3

CAS2

NEC

µPD

4564821G5

-A80-9JF

8ns

125

CAS3

CAS3

CAS2

CAS2

-A80

8ns

125

CAS3

CAS3

CAS3

CAS2

-A10-9JF

8ns

125

CAS3

CAS3

CAS3

CAS2

Samsung

KM

4X(X)SXXXX(X(X))

-G7,-F7

7ns

143

CAS3

CAS3

CAS2

CAS2

-G8,-F8

8ns

125

CAS3

CAS3

CAS2

CAS2

-GH.-FH

10ns

100

N/A

N/A

CAS2

CAS2

Siemens

HYB

39S64XXX(AT(L))

-8

8ns

125

CAS3

CAS3

CAS2

CAS2

-8B

10ns

100

N/A

N/A

CAS3

CAS3

Texas Instrument

TMS

XXXXXX

-8

8ns

125

CAS3

CAS3

CAS2

CAS2

664XX4

-8A

8ns

125

CAS3

CAS3

CAS3

CAS2

-10

8ns

125

CAS3

CAS3

CAS3

CAS2

Toshiba

TC

59S64XXBFT(L)

-80

8ns

125

CAS3

CAS3

CAS2

CAS2

-10

10ns

100

N/A

N/A

CAS3

CAS3

Note: X is used as a variable placeholder.  Parenthesis are used to indicate that a variable may or may not be present...

If you find that the PC100 DIMM you are currently using is made up of SDRAMs that, according to the table above, are 10ns SDRAMs, does this mean that you can't run the 100MHz external CPU/Memory bus speed?  Not necessarily!  There are quite a few modules out there running quite nicely at 100MHz even though they are made up of 10ns SDRAMs.  However, they aren't compliant with the Intel specification and aren't likely to exceed the 100MHz frequency either.  So, if you want to overclock your system by increasing the front side bus as opposed to by increasing the number of clock cycles, it would behoove you to get PC100 DIMMs that are made up of at least 8ns SDRAMs.

Beginning in January we will be reporting our torture-test findings in regards to specific 64 & 128MB PC100 DIMMs, gathered from a variety of sources.  Our testing procedure pushes the limits of the memory to failure and you will see how well and also varied the results are.  So, stop back soon for that...

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