DDR SDRAM

 

Twice As Nice!

Short for Double Data Rate-Synchronous DRAM, a type of SDRAM that supports data transfers on both edges of each clock cycle, effectively doubling the memory chip's data throughput. DDR-SDRAM is also called SDRAM II

Theoretically limited to a maximum frequency of 125MHz, current PC100 SDRAM may, though technological advances be enhanced to enable 133MHz operation. However, bus speeds will need to increase beyond that mark in order for memory bandwidth to keep up with even the next generation of core logic memory controllers and processors. And, while there are several new standards and designs just around the corner,  most of them require new sockets, smaller bus widths, or other design considerations. In the short term,  DDR SDRAM is of great interest because it can function in the same DIMM socket structure presently in use.

DDR SDRAM, by design, activates output operations on the chip to occur on both the rising and falling edge of a clock cycle,  (at present it is only the rising edge signals an event to occur),  effectively doubling the speed of operation  to at least 200MHz..  And, while all of the next generation memories use DDR technology, most use a different "packet" protocol which requires a number of design changes, DDR SDRAM, using the basic design and system infrastructure developed for 100MHz frequency, is simply an extended, enhanced form of SDRAM. DDR SDRAM was approved as a JEDEC(Joint Electronics Device Engineering Council) standard in February, 1998, and currently has a supply base of 9 DRAM vendors


Features Benefits
DDR Data I/O Permits twice the peak bandwidth at the same clock frequency as a standard SDRAM
Uses PC-100 board infrastructure Proven technology in volume production
Enhances SDRAM protocol Evolutionary board designs, maximum reuse of board experiences
Slow, wide buses for bandwidth Increased system design differentiation
More maximum MB/system
Small incremental die size Lower possible price
Uses memory supplier's existing SDRAM manufacturing infrastructure and capacity Lower possible price premium, lower possible price-per-bit
JEDEC Standard with multiple generations and speed improvements Architecture longevity
Multiple sources Assurances of supply and competitive pricing

Already supported by VIA's MVP3 core logic chipset, DDR SDRAM is sure to find a comfortable place in the memory market for years to come.  For more information about DDR SDRAM check out Samsung's DDR SDRAM Product Brief .

1998/99 2000 MediaTek