Performance Enhancements
Externally compatible with Intel's Pentium MMX™ processor and the socket 7 platform, the internal architecture and design of the IDT WinChip 2 processor is quite different from that of the Pentium processor and it's contemporaries (AMD K6 and Cyrix 6x86MX/MII, etc). The IDT WinChip 2, the first low-end CPU implementing support for the 100MHz FSB, superscalar MMX™, and 3DNow!™ instruction set, claims a unique design approach built to provides significant price/performance benefits to the end-user. Providing high performance at low cost and low power, using a unique architecture that includes large on-chip caches, TLBs, and a new pipelined floating point unit which IDT claims can achieve twice the floating point performance of it's earlier release, the WinChip 2 is optimized for it's target PC environment; the $399 - $699 low cost desktop and mobile PC.

According to it's datasheet, " the IDT WinChip 2 processor’s internal design is a return to the same basic concepts of RISC design that allowed microprocessor performance breakthroughs in the 1980s. Recently, however, contemporary x86 processors have followed a different path using very complex internal designs employing advanced architecture concepts such as superscalar execution, out-of-order instruction execution, reorder buffers, non-blocking caches, and so forth (these terms are all found in the datasheets of competitive products). Unfortunately, while these advanced technical concepts make for good technical reading, the real bottom-line benefit that they provide to the end-user has been limited; especially when considering the resultant large chip sizes (resulting in high costs) and high power consumption. No such advanced technical hocus-pocus is to be found on an IDT WinChip 2 processor — it merely offers compatibility with good performance, low cost, and low power consumption ."   Strong wording and pretty amazing claims, if they're true! So, when IDT offered me a chance to get a look at it's new WinChip 2 300, I could hardly refuse. Marketed against a "Performance Rating" much the same as Cyrix' MII and Rise's mP6, the WinChip 2 offers performance marks similar to those achieved by their contemporaries at their rated frequencies.

Basic Architecture
The IDT WinChip 2 processor’s internal design is a five-stage integer pipeline execution core with the addition of an instruction translation stage to translate x86 instructions coming from the fetch stage into the internal micro-instruction format. Fetching and translating x86 instructions is asynchronous to the internal execution pipeline. Integer and floating-point instructions are issued and executed one at a time in program order. MMX™ and 3DNow!™  instructions can be paired, issued and executed two at a time. All instructions are executed and retired in order. Cache and TLB misses stall the pipeline until the data is available for the requesting instruction. In spite of this seemingly basic micro-architecture, the IDT WinChip 2 processor achieves high performance through a series of core optimizations.

The key concepts behind the IDT WinChip 2 processor design lie in it's optimization of simple instructions. Better than 90% of the processor's work load is derived from the execution of "simple" - load, store, branch, and ALU instructions. This is the basic RISC design concept, and, although “simple” x86 instructions are more complex than corresponding RISC architecture instructions, the IDT WinChip 2 processor optimizes the performance of these types of basic x86 instructions while minimizing the hardware provided for other little-used x86 functions. These little-used complex instructions find their primary implementation in microcode with minimal hardware support. Also, IDT's implementation of large on-chip caches and TLBs with optimized management algorithms, executing at internal, rather than external bus frequencies, the WinChip 2 has overcome, somewhat, the limitations imposed by the necessity of off-chip memory accesses, improving CPI performance.

Unlike a number of it's predecessors, the IDT WinChip 2 processor implements very specific and detailed design tradeoffs to provide high performance at the lowest cost. The WinChip 2 provides minimal hardware for CPU functions that are low demand or non-critical to performance in it's target market's environment. These design optimizations and trade-offs are based on IDT's extensive and detailed analysis of the actual behavior of Windows operating systems and software applications. All of this design theory and implementation has resulted in a smaller package size requiring fewer logic transistors which, while reducing production costs, has the added benefit of low power consumption. And, the WinChip 2 is not dependent upon a split voltage configuration.  This makes it an excellent choice when upgrading older systems that can't support split core and external voltages.

One truly interesting point in WinChip 2/3's architecture is IDT's use of fractional clock multipliers which are mapped within the CPU core itself so that, for example, setting your mainboard's jumper configuration for a clock multiplier of 5.0x will result in the processor core operating at a clock multiplier of 2.33x. (see table below)

Motherboard Support
BIOS support for the new Winchip2 is needed primarily for cosmetic reasons so that the boot screen CPUID reflects the actual PR ratings of the WinChip 2. The table below reflects the mainboards approved by IDT for use with the WinChip 2 PR300 as of 3/10/99

Performance
Running the WinChip 2 against similarly situated processors had to include Intel's Celeron 300A Slot-1 processor, which required a different mainboard.  To gauge the performance against the other socket 7 CPU's I also overclocked the Pentium 233MMX and Cyrix MII 333 to use the 100MHz front side bus.

Basic benchmarking for performance was accomplished through the use of ZDBOp's Winstone 99 benchmark application. Each processor ran the benchmark 3 times and the scores reflected below are an average of the three runs.

As you can see, the IDT WinChip 2 sits about dead center in the benchmark scores. It's solid integer performance places it above Intel's P233MMX, Rise's mP6 PR266 and the Cyrix MII.300.  Moving on to gaming performance, while I didn't get around to nearly as many applications as I'd have liked to, I did manage to push out some Quake II Demo 1 demo frame rates.  At a resolution of 640x480 using standard 3Dfx drivers NOT optimized for the 3DNow!™ instruction set with the following results...

I am quite sure that 3DNow! optimized drivers would make a great difference indeed but nevertheless the WinChip 2 seemed to handle the floating point intensive application without strain.

Conclusion

IDT's current flagship processor seems to be capable of decent performance but it's success or failure will depend on it's price structure. Aimed at the low-end market in $399-$699 desktop PCs it has the performance necessary to insure it's success if the price is right.  It also offers an  excellent upgrade opportunity for anyone that doesn't want to go through the hassle of upgrading their mainboard as some models will run on mainboards that don't support either split CPU voltages or the 100MHz front side bus

.  IDT's current roadmap for the WinChip provides for the release of the WinChip 3 which features an 128K onboard cache at performance ratings up to 333 this summer and a WinChip 4 model at performance ratings up to 500 by the end of the year.   Here at The Super 7 Hardware Guide, we see IDT as an up and comer if they can just meet production demand.  Expect to hear a whole lot more from IDT in 1999.

For more information or to find your nearest reseller go to http://www.winchip.com

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