Cyrix' MII Reviewed

Cyrix M-II Review
UPDATED 10/07/98 to include MII 333

If you are still unsure about stepping up to a new Super7 motherboard without first attempting an easier upgrade, this could well be just the ticket. With both Intel and AMD touting their low cost high speed processor solutions, Cyrix has sidled up with an offering of its own. Pushing to the limit its 6x86MX architecture Cyrix has released a faster and more flexible processor in its M-II. While its predecessor could be difficult with its 75-83MHz bus speed, the 0.35 micron 300 and semi 0.25 micron 333, the M-II runs at a 2.9v. core and shows itself extremely stable at 66MHz and 100MHz as well, making it an excellent choice for older split voltage mainboards that. while not capable of using the 100MHz front side bus still can take excellent advantage of the increased speed at an astoundingly low price.


Out of its own data book the Cyrix M II™ processor is described as an enhanced processor with high speed performance. This processor has a 64K unified write-back cache, a two- level TLB (translation lookaside buffer) and a 512-entry BTB (branch target buffer). The M-II CPU contains a scratchpad RAM feature (locking down a portion of the L1 cache for private CPU use), supports performance monitoring, and allows caching of both SMI code and SMI data.
It delivers high 16- and 32-bit performance under Windows 95, Windows NT, OS/2, DOS, UNIX, and other operating systems.
The M-II processor achieves its top performance through combined use of two optimized superpipelined integer units, an on-chip floating point unit, and a 64KB unified write-back L1 cache (generally the L1 cache in let's say a Pentium MMX's split equally into two 16KB data and instruction set caches). The superpipelined architecture reduces timing constraints and increases frequency scalability. Advanced architectural techniques include branch prediction and speculative execution.
The on-chip FPU is capable of processing MMX instructions as well as the floating point instructions. Both types of instructions execute in parallel with integer instruction processing. To facilitate FPU operations, the FPU features a 64-bit data interface, a four-deep instruction queue and a six-deep store queue.
The Cyrix M-II processor although based on the proven 6x86 core operates at higher frequencies than the 6x86MX processor. It is superscalar (capable of processing multiple instructions simultaneously).
The use of advanced processing technology and superpipelining (increased number of pipeline stages) allow the M-II to achieve higher clocks rates.
Using these unique architectural features, the M-II processor eliminates many data dependencies and resource conflicts, resulting in optimal performance for both 16-bit and 32-bit x86 software.
For maximum performance, the M-II contains two caches, a large unified 64 KB  4-way set associative write-back cache and a small high-speed instruction line cache. To provide support for multimedia operations, the cache can be turned into a scratchpad RAM memory on a line by line basis. The cache area set aside as scratchpad memory acts as a private memory for the CPU and does not participate in cache operations.


Although it has a new name and trademark the chip is basically a faster version of the 6x86MX, so those of us who were looking toward increased floating point unit strength and speeds of 300MHz and higher may be a bit disappointed. And while the noticeable lack of the PR before the 300 may encourage you to think of this as a 300-333MHz processor, it is likely a marketing idea inferring that the chip performs on par with the P-II 300. In reality the M-II 300 operates at a 233MHz clock frequency but can be run at anywhere from 200MHz (100 x 2.0) to 233MHz (66 x 3.5) including 208MHz (83 x 2.5) and 225MHz (75 x 3.0), while the 333's default is 250MHz (3 x 83MHz) it also is capable of smooth operation at 66, 75 and 100MHz bus speed performance and this versatility is encouraged to be taken advantage of by the manufacturer themselves. According to the makings on the chip officially the M-II 300 only supports operation at 66MHzx3.5, while the MII 333 officially operates at 250MHz (3 x 83MHz) however the above frequencies will not only work perfectly well with the processor as long as the other components in your system have no problem with the increased FSB frequency changing the PCI bus or ISA/PCI bus frequencies, you may see a bit of improvement by jumping up the front side bus speed.
The 0.35 micron die of M-II 300 and the semi 0.25 micron die of the 333 generate a terrific amount of heat. Normally operating in the 60°-70° cent. range ultimately resulting in a bit of a problem for overclocking as anyone with any experience attempting to OC pretty much any of the 6x86 and 6x86MX will tell you.
Testing the M-II 300 in the AOpen AX59Pro ATX mainboard the chip was extremely stable at the 100MHz fsb speed but failed to boot when moved into the FIC VA-503+ at the 112MHz fsb setting. It had no problems however at any of the 100,83,75,66MHz settings on either board. As my test data will show it did receive a performance boost when using higher quality RAM but the same can be said of pretty much any processor.
The testbed for the MII 333 was the Chaintech CT-5AGM2 which has no SIMM slots and an L2 cache of only 512k, so the tests run weren't as thorough but still reflect the overall capabilities of the processor...

MII 300 Tests
MII 333 Tests