AMD 750 Chipset

Introduction
The AMD-750"! chipset, a highly integrated system logic solution, delivers enhanced performance for the AMD Athlon processor. As the first of its kind you can be sure that there will be some performance issues but, it would appear that AMD chose to err on the side of stability in its design.  And, while there wasn't the rush to market you'd almost expect to find on such a bold new product, the chipset still lacks the kind of maturity inherent in chipsets like Intel's 440BX or VIA's Apollo Pro 133A.  The AMD-750 chipset consists of the AMD-751"! (Irongate) system controller in a 492-pin plastic ball-grid array (PBGA) package and the AMD-756"! (Viper) peripheral bus controller. The AMD-751 system controller features the AMD Athlon system bus, system memory controller, accelerated graphics port (AGP) controller, and peripheral component interconnect (PCI) bus controller.

AMD-751 (Irongate) System Controller

The AMD-751 system controller is designed with the following features:

The AMD Athlon system bus is a split-transaction bus which enhances system throughput by allowing the system controller to schedule tasks and thereby free the bus during resource delays. The AMD-751 system controller is capable of performing I/O transactions, single-access memory transactions, and block-access memory transactions, responding only to I/O cycles within its configuration-register space and to memory requests as defined in its configuration registers. The AMD-751 system controller is designed to optimize the interaction between the processor, DRAM, AGP, and the PCI bus with pipelined burst and concurrent transactions. Each bus interface includes multiple specialized FIFO buffers to enable optimum system concurrency. AMD has introduced in the AMD-751, a memory-request organizer to optimize the bandwidth of the DRAM. The 751 system controller also implements AGP to enhance 3D renderings and reduce graphics memory requirements. Although the AMD-751 is incapable of supporting X4 AGP transfers this shouldn't be of too great a concern as performance in real world applications seem more directly related to local graphics memory as opposed to bandwidth increases in AGP use of system memory. Of note perhaps is the somewhat unstable X2 AGP mode that forces many graphics cards to rely wholly on AGP X1 mode.

AMD-751 System bus Interface

AMD-751 Processor Interface
The AMD Athlon system bus consists of three independent dual data rate channels, responding to processor commands, issuing probes, and controlling all data movement into and out of the processor. These three channels include a 72-bit , point-to-point, non-multiplexed, source-synchronous clocked data transfer channel capable of supporting the AMD Athlon processor with transfer rates of up to 1.6 Gigabyte per second. To achieve higher speed data transfers, the AMD Athlon system bus uses an open-drain, HSTL-like signaling level. Source-synchronous clocking compensates for PC board propagation delays to enable higher speed transfers.

AMD-751 Memory Controller
The AMD-751 DRAM controller's memory-request organizer provides the DRAM interface for the Athlon processor and can support PC-100 Rev. 1.0 SDRAM DIMMs at 100 MHz. The memory-request organizer serves as a data crossbar and determines request dependencies to provide the best scheduling of memory requests. Large on-chip FIFOs are used to decouple requests and provide concurrency. These features combine with the split-transaction processor bus to optimize use of the bus and memory bandwidths. The memory controller can address up to three slots of SDRAM at 100 MHz in various combinations, up to a
total of 768 MB.

The AMD-751 supports the following concurrencies:

PC-100 SDRAM DIMMs allow fast bursting of data between the DRAM and the internal controller data buffers at 100 MHz. At 100MHz this means the max. memory throughput is 800MB/sec. or about 1/2 of the data-pipe between the chipset and CPU.  Logic suggests that the AMD-751 primary performance bottle-neck will most likely show up in memory first.  The DRAM controller supports a 72-bit data path to memory and can be configured to support error correcting code ("ECC" - which can correct single-bit memory errors and detect double-bit errors for data integrity). The BIOS must determine the type of memory installed (64-bit or 72-bit) and program the configuration registers accordingly. The AMD-751 does not support x32 DRAM configurations in 16-Mbit technology, and, while it logically supports x4 configuration, it is not recommended with unbuffered DIMMs.

SuperBypass
The SuperBypass feature, which was improperly implemented in early revisions of the AMD-751, is a feature which can improve performance by allowing the memory-request organizer to bypass unnecessary memory latencies by up to 25% between the main memory and CPU.  This reduction in latencies translates into a 3-5% performance increase with SuperBypass enabled.  SuperBypass is often found in the CMOS setup under "Advanced Chipset Features" but can also be enabled transparently by BIOS programmers.  This is a touchy subject as it makes it nearly impossible to tell if the feature is functional. 

AMD-751 PCI Controller
The AMD-751 system controller is compatible with the PCI Local Bus Specification, rev. 2.2., supports up to six external PCI masters, and can operate at either 3.3v or 5v, offering 64-bit to 32-bit data conversion. Five separate PCI FIFOs containing over 300 bytes of storage are used to facilitate concurrency. The AMD-751 prefetches eight quadwords (one Athlon processor cache line) when performing memory reads for a PCI master. The AMD-751 uses enhanced PCI bus commands such as memory read line (MRL), memory read multiple (MRM), and memory write-and-invalidate (MWI), to maximize data throughput, while minimizing PCI initiator read latency and DRAM utilization. The combination of these features allows a PCI initiator to achieve 133-Mbyte burst transfer rate.

AMD-751 Advanced Graphics Port
The Advanced Graphics Port (AGP) provides a point-to-point link between your graphics controller and the systems memory controller. This path directly to system memory removes 3D graphics traffic from the PCI bus and allows system memory to function as part of graphics memory thereby reducing the amount of memory required on your graphics adapter. Typically, the section of main memory allocated for AGP is considered "texture memory".
The Advanced Graphics Port is essentially an enhancement to standard PCI local bus architecture containing additional sideband signals and commands. There are three primary enhancements to PCI which include pipelined memory requests, separate address and data buses, and 2X AC timing mode, where data is transferred on both edges of the AGP clock. Double-pumping enables effective transfer rates as high as 133 MHz, generating an effective data transfer rate of up to 533 Mbytes/second.  Once again it is important to note that AGP X2 has been shown to have some stability issues depending on mainboard/graphics chip/driver/implementation.
The AMD-751 implements an AGP 1.0-compliant interface, which provides a 32-bit-wide data path operating at either 66MHz or 133 MHz. The AMD-751 can queue 16 outstanding AGP transactions. 

AMD-756 Viper

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