|If you ever even thought about any type of multimedia upgrade, you have no doubt heard of Diamond Multimedia. Diamond Multimedia Systems, Inc. is always on the bleeding edge of anything to do with PCs and interactive multimedia, providing advanced solutions for home, business and professional personal computer users.|
Probably best known for their high-end graphics subsystems, the company's wide expertise also extends to high-performance connectivity products such as analog and digital modems and SCSI host adapters. Their award-winning line of 2D/3D graphics and sound accelerators have long made it possible for users to experience the best of what's out there for the PC. Over the past seven years, Diamond Multimedia's expertise in creating and marketing a broad line of state-of-the-art interactive multimedia and connectivity solutions for the PC has been recognized through literally hundreds of awards from leading national and international computer magazines. And now they have turned that expertise in a new direction with a small but powerful line of mainboards.
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In the C200, based on the ALI Aladdin V - M1541 chipset, Diamond Multimedia is set to deliver the latest enhancement in system board technology for the Super7 user. With support for the Intel Pentium® processor with MMX , the new Cyrix MII 300/333 and the AMD K6®-2 processor, the C200 has the capacity to deliver a new level of performance and scalability for the socket 7 platform. The C200 includes built-in support for 100MHz Front Side Bus (FSB) speeds, PCI, ISA and AGP expansion cards, Ultra DMA/33 IDE hard drive protocol, and optional system hardware management.
By incorporating the Aladdin-V chipset, the fifth generation 586 chipset
from AcerLabs, Diamond has created a stable yet remarkably fast socket 7
architecture for multi-tasking operating systems and software applications.
The northbridge of the Aladdin V, the M1541 chip, includes the higher CPU bus frequency - "100 MHz" - interface for all socket 7 compatible processors. It also provides a PBSRAM and memory cache L2 controller, internal MESI tag bits (16Kx2) and Tag RAM (16Kx10) to enhance performance. It's high performance EDO/Synchronous DRAM controller, PCI 2.1 compliant bus interface, and smart deep buffer design for CPU-to-DRAM, CPU-to-PCI, and PCI-to-DRAM, achieve nearly flawless system performance, and also provides the one of the most flexible 64-bit memory bus interfaces, making it easily DRAM upgradeable with ECC/Parity support, if desired, to enhance system reliability. With it's current AGP interface design, the dedicated PCI-66 AGP interface runs simultaneously with the CPU and PCI interface, and the depth of the read and write buffer design makes more efficient utilization of memory bandwidth . The interface not only supports the AGP 66MHz PCI standard, but also the AGP 1X and 2X sideband address function. With the concurrent bus design, PCI-to-PCI access can run concurrently with CPU-to-L2 and CPU-to-DRAM access, PCI-to-DRAM access can run concurrently with CPU-to-L2 access. The M1541 chip also supports the "snoop ahead" feature making it capable of achieving the PCI master full bandwidth access speed - (133Mbytes). It also provides the enhanced power management features including ACPI support, suspend DRAM refresh, and internal chip power control to support Microsoft's On Now technology operating systems.
The southbridge of the Aladdin V, the M1543 chip, integrates ACPI support, green function, 2-channel dedicated Ultra-33 IDE Master controller, 2-port USB controller, SMBus controller, PS/2 Keyboard/Mouse controller and the Super I/O (Floppy Disk Controller, 2 serial port/1 parallel port) support.
The C200 system board incorporates a 512k pipeline burst SRAM L2 cache which provides a cacheable memory area of 128MB, and the three 168pin DIMM sockets (3.3v unbuffered) provide support for up to 768MB of EDO or Synchronous DRAM (64bit SDRAM/72bit ECC SDRAM) on a memory bus that can run at frequencies between 66MHz and 100MHz (user selectable through the BIOS.)
The C200 has made adequate room for expansion by including 4x32-bit PCI slots, 3x16-bit ISA slots (one PCI/ISA shared) and 1x32-bit AGP 2X slot as well as 2 Universal Serial Bus (USB) ports for all the latest cutting-edge peripherals. Diamond has also included some advanced features like:
SB-LINK for legacy SoundBlaster card compatibility. Wake-on-LAN and Wake-on-RING cable headers and Smart Soft power control.
Packaged along with the system board are (1ea.) IDE and floppy ribbon cables, the Micronics C200 CD, which has ALI Bus Master and AGP drives - both of which will get you started, but should be upgraded from the ALI website on your first opportunity - and Online manual. There is also a one sheet "Quick Installation Guide" that is more than adequate for getting you up and running, however the directions for the front panel I/O are a bit vague. On the plus side - this is one of the easiest and quickest mainboards to set up it has been my pleasure to work with. The board's layout - a bit different from your typical ATX super7 board - is pretty roomy and connects up easily, and jumper configuration is clearly documented on the Quick Installation Guide.
Once you have all of your connectors connected and the jumpers properly configured, it is time to boot up. Here, you'll notice something different as well. Instead of the normal POST screen you get a cool Micronics splash screen that offers access to the post screens and CMOS setup and to be on the safe side it is a good idea to enter CMOS setup and load the setup defaults and then let the BIOS determine you hard disk configuration. If you are using Windows 98 and don't want to reinstall it, you must hold down the F8 key and boot the system into safe mode. It is a good idea to remove the bus bridges installed for your old system through the Device Manager and then re-boot with your Win98 CD in the drive. Windows 98 can setup your hardware properly without any problems and after a few boots to allow the system to reconfigure, you're all set. If you choose, you can reinstall your operating system (recommended) and software, by following the normal routine.
CMOS setup is typical of Award BIOS until you reach the Chipset features screen. For me, anyway, there was some unfamiliar territory here. See table below for a rundown of the properties available to you in this area:
|Chipset Features in BIOS|
|Auto Configuration||Auto Configuration selects predetermined optimal values of the chipset parameters. When disabled, chipset parameters revert to setup information stored in CMOS. Many of the fields in chipset Features configuration are not available when Auto Configuration is enabled (default).|
|L2 TAG RAM Size||The system uses tag bits to determine the status of data in the Level 2 cache. Set this field to match the specification of the installed tag RAM chip.|
|AT Bus Clock||You can set the speed of the ISA bus in terms of a fraction of the CPU clock speed, or at the fixed speed of 7.16MHz. The selections are: 7.16 MHz, CLK2/2, CLK2/3, CLK2/4, CLK2/5, and CLK2/6.|
|DRAM Timing||This selection configures the DRAM read/write timing for maximum performance. The options are Normal (default), Fast, and Slow. NOTE: Before changing this selection, verify the speed of the DRAM currently in-stalled.|
|SDRAM CAS Latency Time||When synchronous DRAM is installed, the number of clock cycles of CAS latency depends on the DRAM timing. Do not reset this field from the default value specified.|
|Pipelined Function||When Enabled, the controller signals the CPU for a new memory address before all data transfers for the current cycles are complete, resulting in faster performance.|
|Graphics Aperture Size (MB)||Select the size of the Accelerated Graphics Port (AGP) aperture. The aperture is a portion of the PCI memory address range dedicated for graphics memory address space. Host cycles that hit the aperture range are for-warded to the AGP without any translation.|
|I/O Recovery Period||The I/O recovery mechanism adds bus clock cycles between PCI-originated I/O cycles to the ISA bus. This delay takes place because the PCI bus is so much faster than the ISA bus.|
|Data Merge||This selection controls the word-merge feature for frame buffer cycles. When Enabled, this controller checks the eight CPU Byte Enable signals to determine if data words read from the PCI bus by the CPU can be merged|
|Memory Hole at 15M-16M||You can reserve this area of system memory for the ISA adapter ROM. When this area is reserved, it cannot be cached.|
|Host Read DRAM Command Mode||This selection allows you to select the type of Host Read DRAM Command Mode: Syn. or Bypass.|
|ISA Line Buffer||The PCI to ISA Bridge has an 8-byte bi-directional line buffer, for ISA or DMA bus master memory reads from, or memory writes to the PCI bus. When Enabled (default), an ISA or DMA bus master can prefetch two doublewords to the line buffer for a read cycle|
|Passive Release||When enabled, CPU to PCI bus accesses are allowed during passive release. Otherwise, the arbiter only accepts another PCI master access to local DRAM.|
|Delay Transaction||The chipset has an embedded 32-bit posted write buffer to support delay transaction cycles. Select Enabled to support compliance with PCI specification version 2.1.|
|Primary Frame Buffer||Select a size for the PCI frame buffer. The size of the buffer should not impinge on local memory.|
|VGA Frame Buffer||When Enabled (default), a fixed VGA frame buffer from A000h to BFFFh and a CPU-to-PCI write buffer are implemented.|
Confused? So was I, and unfortunately the C200's documentation is somewhat poor so, for the neophyte I recommend just leaving Auto Configuration on and forgetting about it. But, for those of you who are like me - suffering from an affliction that causes an uncontrollable urge to tweak - you will most likely need to go beyond the manual to research a bit before deciding on the settings that will best suit your needs.
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