BIOS FAQ
BIOS Updates
AMD-750 Chipset
SiS 530/5595
SiS540 Preview Pt. I
Intel i810 Chipset
Intel's i810E Chipset

 

A Whole New Direction In Core Logic

An Overview
Intel's 810 chipset, in answer to the SiS530 and VIA MVP4, was designed from the ground-up to enable significant platform cost reduction while bringing next generation performance technologies to the value PC arena.

First in a series of new core logic and aimed toward Camino, the i810 is the first to move away from the strictures of having the PCI bus as the main system interconnect. This core logic is designed to open wide the pipes in a direct link to the chipset between crucial IDE, memory and housed graphics controllers, breaking the previous 133MB/sec limitation held when linking subsystems through the PCI bus.

Intel's Celeron™ processor brings great performance at an equally great value to personal computing. Their current line of processors from 366 to 466MHz deliver the all of performance required for today's demanding applications. The Celeron has all the attributes of the same P6 core as the PII processor and includes 128K of on-chip full-speed L2 cache to enhance system performance.
To compliment the Celeron, the Intel® 810 chipset offers a well balanced solution for the value PC market.
A highly-integrated three-chip solution consisting of a Graphics & Memory Controller (Intel 82810), an I/O Controller (Intel 82801), and a Firmware Hub (Intel 82802, the system boards based on the i810 will be making a major splash in the market by mid-summer.

The i810 chipset extends Intel's Scalable Graphics Technology into the value arena by incorporating a powerful 2D/3D graphics subsystem within the core logic. Optimized for system bus frequencies of 66 and 100MHz with an asynchronous or synchronous main memory interface to PC100 SDRAM, its revolutionary new logic partitioning, called Accelerated Hub Architecture, does not rely on the PCI bus for communicating between chipset devices. This enables direct, dedicated control of major I/O subsystems (including IDE, Audio, Modem, and USB). By eliminating arbitration overhead and bandwidth bottlenecks associated with the 33MHz PCI bus, the Intel 810 chipset architecture reduces access times to these key subsystems, increasing system performance especially for multimedia applications. I810 also gives the user all of the power of PC100 SDRAM even though the processor is using an external frequency of 66MHz (for now!).

Intel's design of the 810 and, 820 Camino chipset (just over the horizon) optimize support for the feature set aimed at each's targeted consumer market. The 810 chipset's smart integration (graphics, motion compensation hardware, AC' 97 link, DVD decode, TV out, optimized glue sweep, and ISA legacy elimination) significantly lowers costs by incorporating and thereby reducing necessary system component devices.


The Intel 810 chipset extends Intel’s graphics capabilities into the low-cost PC arena by incorporating 2D/3D capabilities within the memory controller. Maintaining code compatibility with other members of the Intel graphics family (including the Intel® 752 and Intel® 754 stand-alone graphics controllers) the i810's graphics provide the industry with a complete graphics subsystem for every area of the PC market, from the low-cost value arena to the MAX performance gamer's dream machine.
Intel pioneered the concept of, and to a point, the development of shared system memory (utilizing main memory for display and 3D graphics functions) with the introduction of the 430VX chipset back in 1996. The 430VX provided an option for the elimination of a frame buffer, assigning a fixed portion of main memory for screen refresh and 3D rendering requirements. This shared memory implementation was implemented by request/grant based static assignment of main memory at bootup. Improvement of this implementation had been limited to the simple integration of graphics cores into the north bridge of the chipset. The Intel® 810 chipset swings away from today’s shared memory solutions in two new ways - (Direct AGP) complex integration of memory controller and graphics capability and the implementation of advanced dynamic memory utilization (Dynamic Video Memory Technology – D.V.M.T.).

Discrete AGP architecture found in existing chipsets is not ideal for the Value PC market due to the additional system design cost, which is then passed on to the consumers. The major source of this cost increase is the additional components required to create a whole usable system, these can include the discrete graphics controller and, when found, local frame buffer memory. Even greater cost is incurred with the additional design complexity created by the increased number of connections and board size or component density requirements.

Unlike current system controllers, the i810 graphics arbiter schedules requests to send and receive data to and from external graphics, the PCI interface, CPU, and system RAM simultaneously.
Graphics performance can be enhanced in this architecture by having local graphics cache memory. This provides the graphics controller high speed access to critical graphics data stored there, free from scheduling delays imposed by each of the arbiters.
One approach to lowering overall system cost is to simply integrate a graphics core in the same package as an existing north bridge and remove the local graphics memory thereby reducing the number of components and design complexity of the system, but, it does so at the expense of performance. In the i810's implementation, the graphics core accesses system memory for all of the graphics data without sharing memory space with applications data. While this approach provides value for mid-range graphics, it cannot match discrete implementations designed for higher performance/higher priced systems.


The i810's "Direct AGP" delivers AGP class graphics performance to Value PCs. Rather than simply combining two cell libraries for component reduction, Intel architects meshed 2D and 3D video capabilities with the memory control unit. This functional overlap within the Graphics and Memory Controller (Intel 82810) enables Direct AGP. Direct AGP provides the integrated graphics function the capability to make direct memory set-up calls (similar to those associated with standard AGP hardware protocol) to system memory which would result in outstanding video quality. Direct AGP calls dynamically allocate and de-allocate
system memory for complex 3D textures, preserving most the benefits of standard AGP add-in solutions.


Intel's Dynamic Video Memory Technology (D.V.M.T.) ensures the most efficient use of all available memory – regardless of frame buffer presence or main memory sizing – for maximum 3D graphics performance. D.V.M.T. dynamically responds to application's requirements, allocating the proper amount of display and texture memory. The i810 uses the operating system to perceive the Intel 810 chipset driver as an application which uses Direct AGP to request re-allocation of additional memory for 3D applications and returns memory when not required. D.V.M.T. is exceptionally scalable, (i.e. as additional memory is added to the system, more memory will be available to allocate to the dominant 3D applications.) D.V.M.T. works to dynamically allocate the bandwidth available to the CPU, graphics and I/O interface, through it's built=in arbitration unit. This hard coded sorting system pre-assesses the application environment and designates priority to ensure full multimedia enhancement. Through this system the i810 enables system memory to be used for all graphics data structures while maintaining system performance through dynamic load handling/balancing.
The OS will typically require allocation of up to 1MB of system memory to support legacy VGA. This means that system utilities will report 1MB less than the actual physical memory onboard. The graphics driver for the i810 configurations can request up to 6MB of memory from the OS to maintain the i810's maximum 1024x768 screen resolution, 2MB for a command buffer and 4MB used for Z-buffering.
For high performance 3D applications, the drivers request larger allocations of system memory from the OS for AGP graphics textures. When the 3D application is closed, the OS will then re-allocate system memory back for normal windows use.


Intel® 82810 and Intel® 82810-DC100 Product Features

Processor/Host Bus Support Optimized for the Intel Celeron PPGA370 processor

  • Supports 32-Bit System Bus Addressing
  • 4 deep in-order queue; 4 or 1 deep request queue
  • Supports single processor systems only
  • In-order and Dynamic Deferred Transaction
  • Support 66/100MHz System Bus Frequency
  • AGTL+ I/O Buffer

Integrated DRAM Controller 8 MB to 256 MB using 16Mb/64Mb technology (512 MB using 128Mb technology)

  • Supports up to 2 double sided DIMM modules
  • 64-bit data interface
  • 100MHz system memory bus frequency available
  • Support for Asymmetrical DRAM addressing
  • Support for x8, x16 and x32 DRAM device width
  • Enhanced Open page Arbitration SDRAM paging scheme
  • Suspend to RAM support

Integrated Graphics Controller

  • 3D Hyper Pipelined Architecture
  • Parallel Data Processing (PDP)
  • Precise Pixel Interpolation (PPI)
  • Full 2D H/W Acceleration
  • Motion Video Acceleration

3D Graphics Visual Enhancements

  • Flat & Gouraud Shading
  • Mip Maps with Bilinear and Anisotropic Filtering
  • Fogging Atmospheric Effects
  • Z-Buffering
  • 3D Pipe 2D Clipping
  • Backface Culling

3D Graphics Texturing Enhancements

  • Per Pixel Perspective Correction Texture Mapping
  • Texture Compositing
  • Texture Color Keying/Chroma Keying

Digital Video Output

  • 85MHz Flat Panel Monitor Interface Or Digital Video Output for use with a external TV encoder

Display

  • Integrated 24-bit 230MHz RAMDAC
  • Gamma Corrected Video
  • DDC2B Compliant

2D Graphics

  • Up to 1600x1200 in 8-bit Color at 85 Hz Refresh
  • Hardware Accelerated Functions
  • 3 Operand Raster BitBLTs
  • 64x64x3 Color Transparent Cursor
  • Arithmetic Stretch Blitter Video
  • Hardware Motion Compensation Assistance for Software MPEG2 Decode
  • Software DVD at 30fps
  • Digital Video Out Port
  • NTSC and PAL TV Out Support


Hardware Overlay Engine with Bilinear Filtering
Independent gamma correction, saturation, brightness & contrast for overlay
Integrated Graphics Memory Controller
Intel's D.V.M. Technology
Display Cache Interface (82810-DC100 Only)
32-bit data interface
100 MHz SDRAM interface
Support for 1Mx16, (4 MB Only) Arbitration Scheme and Concurrency
Centralized Arbitration Model for Optimum Concurrency Support
Concurrent operations of processor and System busses supported via dedicated arbitration and data buffering


Data Buffering
Distributed Data Buffering Model for optimum concurrency
DRAM Write Buffer with read-around-write capability
Dedicated CPU-DRAM, hub interface-DRAM and Graphics-DRAM Read Buffers
Power Management Functions
SMRAM space remapping to A0000h (128 KB)
Optional Extended SMRAM space above 256 MB, additional 512K/1MB TSEG from Top of
Memory, cacheable
Stop Clock Grant and Halt special cycle translation from the host to the hub interface
ACPI Compliant power management
APIC Buffer Management
SMI, SCI, and SERR error indication
Supporting I/O Bridge



Conclusion
This could well be the most exciting new in the value PC market. From developers that I have spoken with, implementation of the i810 does need some fine-tuning. It would, from the reviews, seem that early releases of system boards based on the platform are experiencing numerous minor irregularities. These will most assuredly be hammered out before the i810 enabled system boards reach wide release. This is one case where Intel seems to want to be up front. The company even goes so far as to disclose the fact that current driver support is significantly lacking, especially as far as 3D applications go. I guess that we should applaud Intel's apparent forthrightness as to the capabilities of the i810. We can only hope that Camino meets with the same honest appraisal of it's capabilities. For now, at least, the overwhelming capabilities offered by Intel's i810 chipset provide a somewhat clouded view of the future of both core logic and future CPU capabilities. I have to express that overall they appear to be pretty exciting. HAL may be waiting for us all just around the corner.

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